Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
Reexamination Certificate
2003-04-10
2009-02-17
Follansbee, John (Department: 2151)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
C709S220000, C709S221000, C709S222000, C709S223000, C709S249000
Reexamination Certificate
active
07493409
ABSTRACT:
The present invention provides an apparatus, system and method for providing a generalized queue pair for use with host channel adapters of a system area network. With the apparatus, system and method, the hypervisor of a host channel adapter maintains a P_Key table for each logical port of the host channel adapter. When a request is received to allocate a queue pair from a requestor application associated with a logical port, a P_Key mode is set in a control register associated with the queue pair based on the type of requestor application that sent the request. Based on this P_Key mode, one or more P_Keys from a P_Key table associated with the logical port from which the request was received are written to one or more P_Key registers allocated to the queue pair. These P_Keys are then used to perform P_Key checks of incoming data packets. In addition, these P_Keys are inserted into headers of outgoing data packets. In a preferred embodiment, the P_Key modes may be a single P_Key check mode, a multiple P_Key check mode, and a P_Key check disabled mode.
REFERENCES:
patent: 6718392 (2004-04-01), Krause
patent: 2003/0023896 (2003-01-01), Kashyap
patent: 2003/0031183 (2003-02-01), Kashyap et al.
patent: 2006/0203846 (2006-09-01), Davis
Craddock David F.
Schmidt Donald William
Walk Bruce Marshall
Follansbee John
International Business Machines - Corporation
Kinslow Catherine K.
Salys Casimer K.
Tang Karen C
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