Apparatus, method, and system for synchronizing information...

Details Apparatus, method, and system for synchronizing information... Apparatus, method, and system for synchronizing information...

2005-05-24

2005-05-24

Moazzami, Nasser (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C712S207000

Reexamination Certificate

active

06898674

ABSTRACT:
According to one embodiment of the invention, a prefetcher in a memory controller is described which includes logic to receive memory request hints from a CPU. The memory request hints are used by the prefetcher in the memory controller to prefetch information from one or more memory devices coupled to the memory controller via a memory bus. The prefetcher in the memory controller further includes logic to determine the types of memory request hints provided by the CPU, the types of memory request hints are used to indicate whether the hints provided by the CPU are for instruction memory read request or data memory read request. The prefetcher in the memory controller also includes logic to generate prefetch requests to prefetch information from the one or more memory devices, based on the types of memory request hints provided by the CPU and bandwidth availability of the memory bus.

REFERENCES:
patent: 6178498 (2001-01-01), Sharangpani et al.
patent: 6240488 (2001-05-01), Mowry
patent: 6438656 (2002-08-01), Arimilli et al.
patent: 20020010838 (2002-01-01), Mowry
Compiler and Run-time Hints for memory management, IBM Technical Disclosure Bulletin, vol. No. 32, pp. 76-77.

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