Apparatus, method and program for decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S776000, C714S784000

Reexamination Certificate

active

07979777

ABSTRACT:
A decoder is configured to include an acquisition-unit configured to acquire first respective likelihoods of data-bits and second respective likelihoods of parity-bits. The data-bits and the parity-bits are included in code data obtained by LDPC-encoding the data-bits with a low density parity check matrix. The decoder also includes a detecting-unit configured to detect reliabilities of the first respective likelihoods and the second respective likelihoods. The decoder also includes a forming-unit configured to form an update schedule representing an order of updating the first and second respective likelihoods in order of increasing reliability, in accordance with the reliabilities. The decoder also includes an updating-unit configured to update the first and second respective likelihoods in the order represented by the update schedule, with the low density parity check matrix. The decoder also includes a discriminating-unit configured to execute hard decision of the likelihoods updated by the updating-unit. The decoder also includes a checking-unit configured to execute parity check of a discrimination result of the discriminating-unit, to obtain the code data.

REFERENCES:
patent: 5560036 (1996-09-01), Yoshida
patent: 5835697 (1998-11-01), Watabe et al.
patent: 6073249 (2000-06-01), Watabe et al.
patent: 2005/0268204 (2005-12-01), Harada
patent: 2005-506733 (2005-03-01), None
patent: 2005-347883 (2005-12-01), None
J. Zhang et al., “Shuffled Iterative Decoding,” IEEE Transactions on Communications, vol. 53, No. 2, pp. 209-213 (Feb. 2005).
Yoshihiro Kurihara et al., “Performance Evaluation of Ordered Sum-Product Algorithm”, Report on Technical Research of IEICE, The Institute of Electronics, Information and Communication Engineers, Mar. 2004, IT 2003-75, pp. 13-18, Abstract.
Notification of Reasons for Rejection, Japanese Patent Application No. 2006-183659, mailed Sep. 30, 2008.

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