Apparatus, method and program for behavioral synthesis...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Reexamination Certificate

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07318213

ABSTRACT:
A behavioral synthesis apparatus includes a control data flow graph generator that generates a CDFG specifying an execution order of calculations written in a behavior description including an external loop processing that includes internal loops processing which does not expand the internal loops processing, a scheduling module carries out scheduling of calculations, and an assigning module divides first pipeline processing for implementing the external loop processing and second pipeline processing for implementing the internal loops processing into stages, and assigns pipeline registers to the external loop processing and the internal loops processing.

REFERENCES:
patent: 6052518 (2000-04-01), Shigeta et al.
patent: 6745160 (2004-06-01), Ashar et al.
patent: 2004/0237056 (2004-11-01), Okada
patent: 2004-326463 (2004-11-01), None
Markus Weinhardt, “Pipeline Synthesis and Optimization for Reconfigurable Custom Computing Machines”, Jan. 3, 1997, pp. 1-9.

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