Apparatus, method and computer program product for...

Electrical computers and digital data processing systems: input/ – Access locking

Reexamination Certificate

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C710S240000

Reexamination Certificate

active

06842809

ABSTRACT:
An apparatus, method and computer program product for minimizing the negative effects that occur when simple locks are highly contended among processors which may or may not have identical latencies to the memory that represents a given lock, are provided. The apparatus, method and computer program product minimize these effects by converting simple locks such that they act as standard simple locks when there is no contention and act as krlocks when there is contention for a lock. In this way, the number of processors spinning on a lock is limited to a single processor, thereby reducing the number of processors that are in a wait state and not performing any useful work.

REFERENCES:
patent: 5678026 (1997-10-01), Vartti et al.
patent: 5790851 (1998-08-01), Frank et al.
patent: 6105085 (2000-08-01), Farley
patent: 6473819 (2002-10-01), Jackson et al.
patent: 6480918 (2002-11-01), McKenney et al.
patent: 20020087769 (2002-07-01), McKenney et al.

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