Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-05-07
2001-11-20
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000
Reexamination Certificate
active
06320235
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to semiconductor memory devices, and more particularly to an electrically conductive substrate interconnect formed in the substrate with an angled implant in a device such as a static random access memory device (SRAM).
BACKGROUND OF THE INVENTION
Static random access memory (SRAM) devices are electronic memory devices that store digital information or data in an arrangement of memory cells. Unlike ordinary, volatile memory devices, static memory devices retain their contents without a refresh cycle. It is interesting to note that a trickle of electrical current, such as the amount of current that would not significantly affect the battery life of a conventional battery, is enough current to maintain the contents of a memory cell of an SRAM.
NMOS and PMOS transistors are formed in SRAM devices. Typically the gates of these transistors overly a substrate and the source/drain regions of the transistors are formed in the substrate. It is necessary to provide an electrical potential to the source/region in order for the transistor to operate. In SRAM fabrication a buried contact region is formed in the substrate. A conductive layer is deposited on the buried contact region. The conductive layer is connectable to an electrical potential. Therefore in order to connect the electrical potential to the source/drain region through the buried contact region there must be an electrical connection between the buried contact region and the source/drain region. In the related art, shown in
FIG. 1
, the source/drain region
1
and the buried contact region
2
overlap thereby providing the electrical connection in area
3
. There are several disadvantages inherent in the structure formed by this process. First the conductive layer
4
is etched to expose the substrate in order to form the source/drain region
1
. Since the etch is not selective over silicon, a typical substrate material, the substrate
5
is inadvertently etched forming a small trench
6
. The formation of the trench
6
necessitates careful manipulation of the process to ensure that the trench
6
does not isolate the buried contact region
2
from the source/drain region
1
or result in side effects such as junction leakage from damage in the silicon substrate. If indeed the trench isolates the two regions the substrate will provide a high resistance path between the two regions. Without proper trench control, yield problems increase and more parts fail. As in any competitive industry, there exists a need to increase yield thereby decreasing costs.
OBJECTS OF THE INVENTION
It is an object of the invention to increase yield and decrease the cost of producing a static random access memory (SRAM) device. The invention features an electrically conductive substrate interconnect and features an angle implant for forming the electrically conductive substrate interconnect. Typically the electrically conductive substrate interconnect provides electrical communication between a buried contact region and the source/drain region of a transistor. The interconnect region provides a low resistance path between the buried contact region and the source/drain region while avoiding the formation of a trench, thereby eliminating potential junction leakage and increasing-yield.
SUMMARY OF THE INVENTION
In a first embodiment the invention is method for forming a low resistance region in a substrate using an angled implant.
In a second embodiment the invention is a semiconductor structure, and the method for fabricating the structure, comprising an electrically conductive substrate interconnect for providing electrical continuity to two non-overlapping electrical regions of the substrate. The electrically conductive substrate interconnect is formed underlying at least a portion of a control region during an angle implant. During the angle implant the substrate is bombarded with ions which enter the substrate at an oblique angle to a face plane of the substrate. The amount of ions entering the substrate and the depth to which the ions are driven is controlled by the depth and composition of the control region, the composition of the substrate, the energy and species of the ions, and by the implant angle of the angled implant.
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Micro)n Technology, Inc.
Ngo Ngan V.
Schwegman Lundberg Woessner & Kluth P.A.
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