Apparatus having a cache and a loop buffer

Details Apparatus having a cache and a loop buffer Apparatus having a cache and a loop buffer

2007-10-02

2007-10-02

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: processing

Processing control

Branching

C711S125000, C711S138000, C711S143000, C711S144000, C712S026000, C712S027000, C712S228000, C712S237000, C712S207000, C712S245000, C719S323000

Reexamination Certificate

active

10788718

ABSTRACT:
Briefly, in accordance with one embodiment of the invention, a processor has a loop buffer and a cache that provides requested information to a processor core.

REFERENCES:
patent: 5353426 (1994-10-01), Patel et al.
patent: 5958040 (1999-09-01), Jouppi
patent: 6085315 (2000-07-01), Fleck et al.
patent: 6154814 (2000-11-01), Uesugi
patent: 6438653 (2002-08-01), Akashi et al.
patent: 6535583 (2003-03-01), Bobick et al.

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