Apparatus having a cache and a loop buffer

Details Apparatus having a cache and a loop buffer Apparatus having a cache and a loop buffer

2000-05-19

2004-06-29

Pan, Daniel H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S026000, C712S027000, C712S228000, C711S125000, C711S138000, C711S143000, C711S144000

Reexamination Certificate

active

06757817

ABSTRACT:

BACKGROUND
In order to provide customers with products that have improved capabilities, it may be desirable to improve the performance of the processor within the product so that the product may operate faster or offer new features. One technique to improve the performance of a processor is to include a cache within the core of the processor. A cache may be used to pre-fetch instructions and/or data that the processor is likely to request in upcoming instruction cycles. When the processor requests an instruction or a piece of data, the request may be compared against a tag array to determine if the data requested is stored in the cache. If a match is found in the tag array, then a cache “hit” has occurred. Accordingly, the stored information or data may then be provided to the processor by the cache. If the requested information is not in the cache, then a cache “miss” has occurred and the information may have to be retrieved from other sources. Providing the information from a local cache is generally faster than retrieving the instructions or data from a slower memory source, such as a disk drive.
However, the improved performance that might be gained by using a cache often comes with the expense associated with increased power consumption and die size of the cache. Thus, there is a continuing need for better ways to improve the performance of processors.


REFERENCES:
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patent: 5958040 (1999-09-01), Jouppi
patent: 6085315 (2000-07-01), Fleck et al.
patent: 6154814 (2000-11-01), Uesugi
patent: 6438653 (2002-08-01), Akashi et al.
patent: 6535583 (2003-03-01), Bobick et al.

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