Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2001-06-13
2004-02-24
Gossage, Glenn (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C341S144000, C341S154000
Reexamination Certificate
active
06697922
ABSTRACT:
FIELD OF THE INVENTION
The present application relates generally to a microcontroller and a memory unit coupled to an electronic digitally switched potentiometer.
BACKGROUND OF THE INVENTION
Microcontrollers are used in many applications and comprise usually a plurality of peripheral components. Within a microcontroller a central processing unit (CPU) having an arithmetic logic unit (ALU) and a load and store unit or a combination of both is located. The CPU is coupled through a bus with a memory to provide storage capacity for program instructions and data. Program and data memory can be separate with different bus lines or embodied in a single memory unit. Other peripheral components may be coupled through the same or additional busses. A known peripheral device is an electronic digital potentiometer, for example a digitally switched potentiometer as disclosed in U.S. Pat. No. 6,201,491 which is hereby incorporated by reference. Such a digitally switched potentiometer can be controlled by the CPU and is thereby coupled through such a bus with the CPU. A microcontroller is designed to execute a plurality of instructions. The instruction set defines the capability of the respective microcontroller. The processing speed of a microcontroller depends on many factors. The instruction set is one of them as complex tasks might need a plurality of instructions to be executed. Generally one can say, the less the number of instructions that has to be executed for a specific task, the faster that task can be performed. For supplying a digitally switched potentiometer with data, the CPU has to load that data into registers and then move the data to the digitally switched potentiometer. A problem occurs in case a great deal of data transfers have to be executed. In such a case, significant time might be used to perform such a task.
SUMMARY OF THE INVENTION
Therefore, the present application discloses exemplary embodiments which overcome the above mentioned problems as well as other shortcomings and deficiencies of existing technologies.
In a first exemplary embodiment a microcontroller comprises a central processing unit with an execution unit for executing instructions. A memory unit is coupled with the central processing unit through a bus. Furthermore, a digitally switched potentiometer is provided and a data transfer unit is coupled with the memory unit and the potentiometer, wherein the data transfer unit transfers data between the memory unit and the potentiometer upon execution of a predefined instruction.
A method of transferring data between a memory unit and a potentiometer within a microcontroller arrangement comprises the steps of:
providing an instruction set for the microcontroller wherein an instruction within the instruction set defines a data transfer between the memory unit and the potentiometer;
upon execution of the instruction transferring data between the memory unit and the potentiometer.
The data transfer unit of the microcontroller may comprise a counter having a clock input receiving a clock and an output which is coupled with the memory unit. Furthermore a programmable divider unit for dividing the clock may be provided. The data transfer unit may further comprise a loop register and an incrementer unit coupled with the loop register.
The memory unit may be an electrically erasable programmable read only memory (EEPROM) or a flash EEPROM.
The instruction may comprise an opcode and an address specifying a memory location or an opcode and an address specifying a start memory location and an end memory location. In another embodiment, the instruction comprises an opcode and an address specifying a start memory location and a number indicating the number of consecutive data from the start memory location.
REFERENCES:
patent: 5084667 (1992-01-01), Drori et al.
patent: 5243535 (1993-09-01), Bolan et al.
patent: 5717935 (1998-02-01), Zanders et al.
patent: 6201491 (2001-03-01), Brunolli et al.
Baker & Botts L.L.P.
Gossage Glenn
Microchip Technology Incorporated
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