Apparatus for testing semiconductor device

Details Apparatus for testing semiconductor device Apparatus for testing semiconductor device

1999-09-29

2002-02-26

Moise, Emmanuel L. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S721000, C714S735000, C714S736000, C324S765010, C365S201000

Reexamination Certificate

active

06351834

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to automatic test equipment (ATE) for semiconductor devices.
A semiconductor device with built-in logic circuits is not shipped as a good product until the device has passed all types of tests including DC, AC and functional tests. A principal item under the AC test, which is also called a “timing test”, is checking a signal propagation delay. When the functional test is carried out, a particular signal pattern is applied to an input terminal of a device under the test, thereby verifying whether a pattern appearing at an output terminal of the device is as expected.
SUMMARY OF THE INVENTION
An object of the present invention is carrying out a timing test using a circuit configuration usually applied for a functional test.
To achieve this object, an apparatus for testing a semiconductor device according to the present invention includes: a clock generator for generating a clock signal; a controller for controlling the overall operation of the testing apparatus in synchronism with the clock signal; a pattern generator for generating input and expected patterns in accordance with an instruction given by the controller; and a plurality of testing units, each of which is applied to an input or output terminal of the semiconductor device. Each of these testing unit includes: an input voltage generator for generating a voltage signal to be applied to the input terminal of the semiconductor device based on the input pattern; an output voltage comparator for determining a logical level of the voltage signal appearing at the output terminal of the semiconductor device; a logic comparator for checking whether or not the logical level determined by the output voltage comparator matches with the expected pattern; a switch for selecting either a signal path leading from the input voltage generator to the semiconductor device or a signal path leading from the semiconductor device to the output voltage comparator; and a timing generator for generating a timing signal synchronized with the clock signal in accordance with an instruction given by the controller and for supplying the timing signal generated to the input voltage generator or the output voltage comparator.


REFERENCES:
patent: 4335457 (1982-06-01), Early
patent: 4631724 (1986-12-01), Shimizu
patent: 4710704 (1987-12-01), Ando
patent: 4821238 (1989-04-01), Tatematsu
patent: 5266894 (1993-11-01), Takagi et al.

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