Apparatus for simultaneous write access to a single bit memory

Static information storage and retrieval – Read/write circuit – Simultaneous operations

Patent

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Details

36518907, G11C 700

Patent

active

052671992

ABSTRACT:
In an apparatus including a first and second processor coupled to a shared bit-RAM memory, simultaneous write operations can be performed without internal race conditions in the memory. Rather than using arbitration, a write is generated by logic in each processor only when data to be written is different from data currently stored in a given location. A processor can write data to the bit-RAM only when a write pulse has been generated by that processor. Clocking signals from the processors are used to insure that a read and a write operation are not performed by two separate processors.

REFERENCES:
patent: 4663742 (1987-05-01), Anderson et al.
patent: 5036491 (1991-07-01), Yanaguchi

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