Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-12-18
1997-09-02
Kim, Matthew M.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711112, 711165, G06F 1328
Patent
active
056642245
ABSTRACT:
A data processing system including a buffer memory having a plurality of segments for storing data and a memory location pointer having a plurality of bits, where each of the memory location pointer bits corresponds to a respectively different one of the buffer segments. The data processing system includes a central processing unit that writes binary data values into the memory location pointer to indicate availability of each of the buffer segments. A direct memory access controller unit continually transfers blocks of data from a mass storage device into the available buffer segments as indicated by the memory location pointer. The DMA controller further changes the state of the binary values, corresponding to the segments into which the blocks of data were stored, to indicate that the segments are not available for data transfer. The data processing system identifies each block of data, as it is stored in different buffer segment locations, to match the transferred block of data to the requests for data from the storage device.
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Escom AG
Kim Matthew M.
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