Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Patent
1999-04-13
2000-04-04
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
712 7, 712 5, G06F 700
Patent
active
06047372&
ABSTRACT:
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maximum number of the multimedia operations within as few instruction cycles as possible. Complex algorithms are readily performed by arranging operands upon the vector ALU in accordance with the desired algorithm flowgraph. The ORU aligns the operands within partitioned slots or sub-slots of the vector registers using vector instructions unique to the MEU. At the output of the ORU, operand pairs from vector source or destination registers can be easily routed and combined at the vector ALU. The vector instructions employ special load/store instructions in combination with numerous operational instructions to carry out concurrent multimedia operations on the aligned operands. In one embodiment multiple ALUs may each receive one operand from a fixed source register slot location, where the fixed slot location may be different for each ALU. The operand routing may provide another operand from any source register slot location for another input to each respective ALU.
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Favor John G.
Longhenry Brian E.
Thayer John S.
Weber Frederick D.
Advanced Micro Devices , Inc.
Compaq Computer Corp.
Daffer Kevin L.
Kim Kenneth S.
Kowert Robert C.
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