Apparatus for reducing the effects of power supply distribution

Static information storage and retrieval – Read/write circuit – Noise suppression

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365226, G11C 702

Patent

active

060727403

ABSTRACT:
A method is provided for reducing the effects of power supply distribution related noise in an integrated circuit, the integrated circuit having a power supply bus, a ground bus, a DRAM-technology capacitor, and a load circuit. The method includes forming the DRAM-technology capacitor adjacent the load circuit, and connecting the DRAM-technology capacitor directly between the supply voltage bus and the ground voltage bus.

REFERENCES:
patent: 5455192 (1995-10-01), Jeon
patent: 5801412 (1998-09-01), Tobita
patent: 5838038 (1998-11-01), Takashima et al.

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