Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2000-05-22
2003-01-21
Niebling, John F. (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S778000, C257S779000, C257S780000, C438S108000, C438S612000, C438S613000
Reexamination Certificate
active
06509646
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for reducing electrical noise inside a ball grid array package, and particularly to an apparatus for embedding a plurality of capacitors on a power plane and ground plane inside a ball grid array package by semiconductor package technology.
2. Description of Related Art
For the progress of semiconductor process technology, hundreds of thousands or even millions of transistors are built inside an integrated circuit. If the plurality of transistors are working simultaneously, such as turning on or turning off simultaneously, a pulse effect and electrical noise will be created for power supply and make computing results of the integrated circuit unstable.
For resolving the problem of the unstable voltage and electrical noise for power supply, a prior method fixes a plurality of capacitors on the circuit board, to eliminate the electrical noise.
FIG. 1
is a top view of a prior plastic ball grid array (PBGA) package. The plastic ball grid array package
11
is fixed on a circuit board
13
. A plurality of outside-connected capacitors
12
is provided around the plastic ball grid array package
11
. Each outside-connected capacitors is electrically connected to a power plane and ground plane of the plastic ball grid array package
11
to eliminate an electrical noise induced between the power plane and ground plane.
The prior method requires a lot of capacitors of different sizes and different kinds on the circuit board
13
. The prior method is not only costly but also requires a large area of the circuit board. Moreover, the prior method is not suitable for use in the modem tendency of compactness.
SUMMARY OF THE INVENTION
Accordingly, the object of the present invention is to resolve the drawbacks of high cost and large area occupied as in the prior art. In order to accomplish the object, the present invention proposes an apparatus for reducing an electrical noise inside a ball grid array package. The apparatus fixes a plurality of inside-connected capacitors on a substrate of the apparatus by semiconductor packaging technology, and the plurality of inside-connected capacitors is directly, or through vias, connected to the power plane and ground plane of the apparatus to efficiently achieve the purpose of providing a stable voltage and filtering the electrical noise.
The apparatus of the present invention for reducing an electrical noise inside a ball grid array package mainly comprises a substrate, a plurality of solder balls and a plurality of inside-connected capacitors. The substrate includes a contact layer, a power plane and a ground plane. The plurality of solder balls are fixed on said contact layer. The plurality of inside-connected capacitors are fixed on said contact layer, and a conductive glue is used to electrically connect the capacitors to the power plane and ground plane to reduce the electrical noise between the power plane and ground plane.
REFERENCES:
patent: 5801432 (1998-09-01), Rostoker et al.
patent: 5825628 (1998-10-01), Garbelli et al.
patent: 5854085 (1998-12-01), Raab et al.
patent: 6201298 (2001-03-01), Sato et al.
patent: 6369443 (2002-04-01), Baba
Lin Wei-Feng
Tsai Chen-Wen
Wu Chung-Ju
Gurley Lynne A.
Niebling John F.
Silicon Integrated Systems Corp.
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