Chemistry: electrical and wave energy – Apparatus – Coating – forming or etching by sputtering
Reexamination Certificate
1998-11-16
2001-04-24
Kalafut, Stephen (Department: 1745)
Chemistry: electrical and wave energy
Apparatus
Coating, forming or etching by sputtering
C204S298110, C204S298150, C204S298310, C118S7230ER, C118S729000
Reexamination Certificate
active
06221221
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to semiconductor wafer processing equipment and, more particularly, the invention relates to a return path for RF current within such equipment.
2. Description of the Background Art
Plasma-enhanced reactions and processes have become increasingly important to the semiconductor industry, providing for precisely controlled thin-film depositions.
FIG. 1
depicts a cross-sectional, simplified view of a conventional physical vapor deposition (PVD) wafer processing chamber
100
of the prior art. The chamber
100
comprises a set of walls that define a volume having a conventional pedestal assembly
102
positioned in the volume. The pedestal assembly
102
comprises a pedestal
106
and a susceptor
107
. The susceptor
107
has a surface
114
that supports a wafer
104
. A chamber lid
110
at the top of the chamber
100
contains deposition target material (e.g., titanium) and is negatively biased by a DC source
119
to form a cathode. Alternately, a separate target is suspended from the chamber lid
110
. The chamber lid
110
is electrically insulated from the remainder of the chamber
100
. Specifically, an insulator ring
112
, electrically isolates the chamber lid
110
from a grounded annular shield member
134
which forms an anode. The pedestal assembly
102
has a range of vertical motion within the chamber
100
to facilitate wafer transfer. The pedestal assembly is depicted in a raised position (wafer processing position) in FIG.
1
. The chamber includes a ring assembly
118
that prevents deposition from occurring in unwanted locations such as upon the sides of the susceptor, beneath the pedestal and the like. Specifically, a waste ring
120
and cover ring
122
prevent sputtered material from being deposited on surfaces other than the substrate.
An electric field is induced in a reaction zone
108
between the cathode chamber lid
110
and anode shield member
134
when the DC source
119
is switched on. A process gas such as argon is provided to the reaction zone
108
via a working process gas supply (not shown). The electric field created by the high power DC source
119
ionizes the process gas and creates a uniform, high-density, low electron temperature plasma
116
. The grounded shield member
134
surrounds a reaction zone
108
and confines the plasma
116
to enhance deposition.
To further enhance deposition in an ion metallization system, a specific type of PVD system, the substrate
104
and susceptor
107
are biased negatively with respect to the plasma
116
. This is accomplished by providing RF power to an electrode
130
within the pedestal assembly
102
. Ordinarily, a 400 KHz AC source
136
is used to bias the substrate
104
, but other frequency sources such as a 13.56 MHz source may also be used. A negative DC potential (i.e., a bias voltage) accumulates on the substrate
104
as a result of the higher velocity of electrons as compared to the positive ions in the plasma
116
. In some PVD processes, as neutral target material is sputtered from the target and enters the plasma
116
, the target material becomes positively ionized. With the negative DC offset at the substrate, the positively ionized target material is attracted to and deposits on the substrate in a highly perpendicular manner. That is, the horizontal component of acceleration and/or velocity of the positive ion is reduced while the vertical component is enhanced. As such, the deposition characteristic known as “step coverage” is improved.
Ideally, the bias voltage on the substrate
104
(i.e., a semiconductor wafer) remains stable as the target material is being deposited onto the substrate
104
. A stable voltage level at the substrate
104
causes the ionized deposition material to be drawn uniformly to the substrate
104
. A uniform deposition film layer is a highly desirable characteristic in the semiconductor wafer manufacturing industry. Voltage stability is optimized when there is no appreciable voltage drop due to current flowing in the return path from the shield member
134
to ground.
In the prior art, the ground path for RF current is rather circuitous. For example, the substrate
104
is in electrical contact with the plasma
116
which is in electrical contact with the shield member
134
. The shield member
134
is connected to the chamber wall
103
. The chamber wall
103
, in turn, is connected to the pedestal
106
through a flexible bellows
138
. The pedestal is connected to ground through a tube
140
that runs inside the bellows
138
. Typically, the bellows
138
are made of thin stainless steel discs welded together. The discs are very thin and stainless steel has a relatively low conductivity. This is not a problem for DC currents since the voltage drop over the return path is small. However, for RF applications, currents of approximately 20 to 30 amps are common. The stainless steel bellows
138
have a high RF impedance. As such, the bellows are unsuitable as a return path for RF currents since a large voltage drop develops across the bellows during processing. Such a large voltage drop, induced by the large impedance of the return current path, causes high voltages on the surface of the pedestal
106
. Plasma can strike between two points at substantially different voltages and lead to stray plasma in the chamber. For example, such an unwanted plasma can strike between the pedestal
106
at a high potential and some other nearby grounded feature such as the shield member
134
, the chamber walls
103
or bake out lamps (not shown). The stray plasma spreads out to fill all of the space outside the reaction zone
108
(i.e., the region between the pedestal
106
, the bellows
138
, the shield member
134
and the chamber walls
103
). The stray plasma may sputter material from the bellows
138
and pedestal
106
introducing contaminants into the chamber environment as well as reducing the life of the pedestal assembly.
In a 300 mm wafer processing system the path to ground is especially long and the voltages induced are quite high (e.g., approximately 700 volts peak to peak). As such, the voltage on the wafer
104
becomes unstable and non-reproducible. The long return path also creates a variable impedance that changes after each repositioning. A ground path could be made between the shield member
134
and the pedestal
106
via the waste ring
120
and the cover ring
122
. However, this path would be broken each time the pedestal assembly
102
is lowered and raised during wafer transfer and, therefore, would be unreliable.
Therefore, a need exists in the art for reliable low impedance return path for RF current to ensure wafer voltage stability and uniformity of deposition.
SUMMARY OF THE INVENTION
The disadvantages associated with the prior art are overcome by the present invention of an apparatus for providing an RF return path having a low impedance electrical connection between a shield member and a grounded pedestal of a semiconductor wafer processing chamber. The inventive apparatus comprises a low impedance return path assembly that forms a direct electrical connection between the shield member and the pedestal. The return path assembly comprises a conductive strap connected to the pedestal and a conducting bar connected to the strap. The bar makes electrical contact with the shield member via a toroidal spring. A support assembly mechanically supports a part of the return path assembly. Specifically, the support assembly, comprising vertical and horizontal bars, supports the conductive bar. The support assembly is attached to a collar that is secured to a bottom chamber wall.
The return path thus provides a short-cut for RF current flowing from the shield member to ground. The short-cut avoids the circuitous path that existed in the prior art and thereby reduces the RF voltage drop between the shield member and ground. The ground path remains intact throughout wafer cycling and is only disconnected when the shield member is removed.
REFERENCES:
patent: 36617
Al-Shaikh Ayad
Fu Jianming
Gopalraja Praburam
Rosenstein Michael
Stimson Bradley O.
Applied Materials Inc.
Kalafut Stephen
Mercado Julian A.
Thomason Moser & Patterson LLP
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