Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1996-05-23
1999-05-04
Barry, Esq., Lance Leonard
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
G06F 1214
Patent
active
059000198
ABSTRACT:
Apparatus for protecting memory storage blocks (page frames) against unwanted I/O accesses, including I/O data transferred in an unwanted direction. I/O storage keys are provided in an I/O protection array. Each I/O key is comprised of one or two bits and is associated with a respective storage block in computer memory. If the array contains two bit I/O keys, each key has 4 settings for controlling I/O accesses to an associated storage block; which: 1) inhibit an I/O access in the input direction of I/O data flow, 2) inhibit an I/O access in the output direction of I/O data flow, 3) allow I/O accesses in both directions, or 4) prevent all I/O accesses. If the array contains single bit I/O storage keys, each key has two settings, which: 1) prevent all I/O accesses in the associated storage block, or 2) allow all I/O accesses in the associated block. No I/O program keys are needed for controlling this type of I/O protection, which avoids key comparison operations by the I/O access protection apparatus. Nevertheless, the use of the subject I/O protection apparatus does not prevent the use of apparatus for protecting the same storage blocks from unwanted accesses by central processors, which may use CPU storage keys. Such CPU storage keys may be contained in a hardware array, or may be contained in a virtual storage page table without having any hardware CPU storage key array. If desired, the subject I/O storage protection apparatus may be used without providing any CPU storage protection.
REFERENCES:
patent: 4366537 (1982-12-01), Heller et al.
patent: 4472790 (1984-09-01), Burk et al.
patent: 4580217 (1986-04-01), Celio
patent: 4604688 (1986-08-01), Tone
patent: 4954982 (1990-09-01), Tateishi et al.
patent: 5163096 (1992-11-01), Clark et al.
patent: 5193175 (1993-03-01), Cutts, Jr. et al.
patent: 5237668 (1993-08-01), Blandy et al.
patent: 5335334 (1994-08-01), Takahashi et al.
patent: 5724551 (1998-03-01), Greenstein et al.
patent: 5737575 (1998-04-01), Blaner
Capowski, R.S. et al., "Dynamic Address Translator for I/O Channels", IBM Technical Disclosure Bulletin, vol. 23, No. 12, May 1981, pp. 5503-5508.
Greenstein Paul Gregory
Guyette Richard Roland
Rodell John Ted
Barry, Esq. Lance Leonard
Goldman Bernard M.
International Business Machines - Corporation
Kinnaman Jr. William A.
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