Apparatus for preventing glitch for semiconductor non-volatile m

Static information storage and retrieval – Read/write circuit – Differential sensing

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36518906, 365233, 307443, 307465, 307542, G11C 700, G11C 1140, H03K 19003, H03K 190175

Patent

active

052650618

ABSTRACT:
A semiconductor non-volatile memory device having non-volatile memory cells for storing binary data, a plurality of column lines respectively connected to the plurality of memory cells and a plurality of row lines respectively connected to the plurality of memory cells comprising a plurality of dummy cells, having the same structure as the memory cells, respectively connected to the column lines and arranged to be set in an ON state upon being selected, a dummy row line connected to the plurality of dummy cells, a dummy row line selector for selecting the dummy row line for a predetermined period in response to a chip selection signal for selecting the memory device. Therefore, since the dummy row line is selected for the predetermined period before the memory device is selected by a computer system or the like, each of the column lines is set at a ground potential by a dummy memory cell set in an ON state. During a transition from the non-selected state to a selected state of the memory device, in synchronism with the transition from the non-selected state to the selected state of a target memory cell in a plurality of memory cells, the state of a dummy cell connected to the target memory cell transits from the selected state to the non-selected state.

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patent: 4982364 (1991-01-01), Iwahashi
patent: 5136186 (1992-08-01), Trinh et al.

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