Adhesive bonding and miscellaneous chemical manufacture – Differential fluid etching apparatus – With measuring – sensing – detection or process control means
Reexamination Certificate
2000-12-18
2004-10-12
Goudreau, George A. (Department: 1763)
Adhesive bonding and miscellaneous chemical manufacture
Differential fluid etching apparatus
With measuring, sensing, detection or process control means
C156S345330, C156S345380, C156S345480, C156S916000, C118S7230IR, C118S7230IR
Reexamination Certificate
active
06802933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to etching trenches in silicon substrates and cleaning processes to remove deposits from reactors used in etching processes. The method of the invention is generally applicable to the-etching of silicon, but is particularly useful in the etching of deep trenches. Silicon deep trench etching is most commonly used in capacitor technology, in particular, in DRAM applications. Other applications for the present etching method include the etching of shallow trenches used in applications such as device isolation; the etching of polysilicon gates; and the etching of silicide layers. In addition, the present etching method is useful in process sequences utilized in the micro machining of silicon surfaces for biomedical applications, for example.
2. Description of the Related Art
Although the silicon etching method of the present invention is useful in a number of applications, as mentioned above, one of the most important applications is the etching of high aspect ratio (over about 20:1) trench capacitors used in DRAM applications. The profile of the etched trench must meet strictly defined industry standards. The current specification for a 256 Mb DRAM capacitor having a critical diameter ranging from about 0.15 to about 0.38 &mgr;m calls for strict profile taper control.
The development of manufacturing technology for fabrication of the trench structure
103
shown in
FIG. 1C
(and for silicon trench structures of the future) depends on development of a plasma etch technology which provides adequate selectivity for the silicon substrate over the patterning layer
108
, the masking layer
106
, and the dielectric layer
104
, while providing an economically feasible etch rate for the silicon substrate layer
102
, and enabling the necessary profile control as the dimensions of trench
103
are reduced. Additionally, as new profile control processes are developed, production worthy chamber cleaning methods and chemistries must also be developed to ensure economically feasible substrate throughput.
The typical approach to forming deep trenches in a representative DRAM stack (e.g., the DRAM stack
100
illustrated in
FIG. 1A
) is conducted in a linear fashion, first etch a via through the stack
100
to the substrate surface
105
or a substrate open step, then etch the trench
103
. This division of the trench process led to process sequences intended to optimize processing in each of these two divisions—substrate open and trench etch.
FIG. 1A
illustrates a portion of a representative structure
100
useful in capacitor fabrication. Structure
100
includes a silicon substrate
102
, a dielectric pad oxide layer
104
, a masking layer or hard mask
106
, and a patterning layer
108
. Typically the dielectric pad oxide layer is silicon dioxide, the masking layer is silicon nitride, and the patterning layer material is borosilicate glass (BSG) or a silicon oxide deposited using tetraethyl orthosilicate (TEOS), or a combination thereof. In some applications, a dielectric Anti-Reflective Compound (ARC) layer such as siliconoxynitride may be used in combination with the patterning layer.
Generally, trench formation production processes are accomplished by having a chamber dedicated to the substrate open process and another chamber dedicated to the trench etch process. The number of chambers used for each process depends upon throughput considerations such as the relative duration of the etch processing cycles and cleaning cycles as well as the specific dimension of the trench being formed and the thickness of the individual layers of structure
100
.
A representative deep trench etch process will be described in relation to a structure
100
where the thickness of the borosilicate glass patterning mask
108
is about 7,000 Å; the thickness of silicon nitride masking layer
106
is about 2,200 Å; the thickness of pad oxide dielectric layer
104
is about 80 Å.
FIGS. 1A
,
1
B and
1
C are not to scale.
FIG. 1A
illustrates a substrate having stack
100
as it is loaded into the first processing chamber.
In the first processing chamber, which may be for example, a Magnetically Enhanced Reactive Ion Etch (MERIE) Chamber, or other processing chamber suitable for conducting the substrate open process. Reactive gases are introduced and a plasma is formed to expose the substrate
102
top surface
105
by removing patterning layer
108
, masking layer
106
and pad oxide layer
104
. The mask is typically opened by plasma etch using CHF
3
and O
2
based chemistry. Typical etch rates for this type of process are about 1 &mgr;m/minute. Periodic dry cleaning is conducted after processing about 100 wafers. In this example, about 9280 Å of material is removed during the substrate open process.
During the etching processes, etchant residue (often referred to as a polymer) deposits on the walls and other component surfaces inside the etching chamber. The composition of the etchant residue depends upon the chemical composition of vaporized species of etchant gas, the material being etched, and the mask layer on the substrate. The vaporized and gaseous species condense to form etchant residue comprising polymeric byproducts composed of hydrocarbon species from the resist; gaseous elements such as fluorine, chlorine, oxygen, or nitrogen; and elemental silicon or metal species depending on the composition of the material being etched. The polymeric byproducts deposit as thin layers of etchant residue on the walls and components in the chamber. The composition of the etchant residue typically varies considerably across the chamber surface depending upon the composition of the localized gaseous environment, the location of gas inlet and exhaust ports, and the geometry of the chamber. The compositionally variant, non-homogeneous, etchant residue formed on the etching chamber surfaces has to be periodically cleaned to prevent contamination of the substrate.
Typically, after processing the substrate open process on about 100 wafers, an in-situ plasma “dry-clean” process is performed in an empty etching chamber to clean the chamber. Periodically, the chamber is taken out of service to conduct a wet clean to more completely remove processing residue.
After conducting the substrate open process, the substrate is transferred into the second processing chamber to conduct the trench etch process. The second processing chamber may be any processing chamber suitable for etching deep trenches in substrates such as, for example, a Decoupled Plasma Etch Reactor as manufactured by Applied Materials, Inc. of Santa Clara Calif. During the trench etch process, a mixture of processes gases is introduced into the chamber and formed into a plasma which is used to remove substrate material to form the trench. A typical deep trench structure 103 is illustrated in FIG.
1
C. The top portion
110
of the trench
103
, which extends from the silicon surface
105
into the silicon substrate
102
a depth
114
of about 1.5 &mgr;m is specified to taper at an angle of 88.5°+/−0.5°. The bottom portion
112
of the trench
103
, which extends beneath the top portion
110
for an additional depth
116
of about 6.5 &mgr;m is specified to taper at an angle of 89.5°+/−0.5°. The bottom of the trench is illustrated as rounded but may be bottle shaped rather than tapered.
Related U.S. patent application Ser. No. 09/102,527, filed Jun. 22, 1998, assigned to the assignee of the present invention, describes a method for etching high aspect ratio trenches in silicon where at least a portion of the silicon trench, particularly toward the bottom of the trench, is etched using a combination of reactive gases including fluorine-containing compound which does not contain silicon (FC); a silicon-containing compound (SC), which preferably also contains fluorine; and oxygen (O
2
). The use of a fluorine-containing silicon compound is preferred as a means of improving the etch rate and removing debris from the etched surfac
Chinn Jeffrey D.
Khan Anisul
Kumar Ajay
Podlesnik Dragan
Bach Joseph
Church Shirley L.
Glenn Walter Benjamin
Goudreau George A.
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