Apparatus for performing a user requested reset during algorithm

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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711103, 713330, G06F 1200

Patent

active

060556145

ABSTRACT:
A method and apparatus for reseting, for example, a Flash electrically erasable programmable read-only memory (EEPROM) having a microcontroller, the method and apparatus receiving a reset signal and, in response to said reset signal: determining if said microcontroller is performing an algorithm that manipulates a voltage and if said microcontroller is performing such an algorithm, performing a first operation to change the voltage, and performing a second operation to reset a logic.

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patent: 5396639 (1995-03-01), Suenaga et al.
patent: 5509134 (1996-04-01), Fandrich et al.
patent: 5594686 (1997-01-01), Hazen et al.
patent: 5621678 (1997-04-01), Doller

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