Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
1999-04-30
2003-11-11
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230060
Reexamination Certificate
active
06646941
ABSTRACT:
REFERENCE TO CO-PENDING APPLICATIONS
“METHOD FOR OPERATING AN INTEGRATED CIRCUIT HAVING A SLEEP MODE” by Michael L. Longwell, et al., application Ser. No. 09/303,284 and assigned to the assignee hereof and filed concurrently herewith.
FIELD OF THE INVENTION
The present invention relates to integrated circuits, and more specifically to integrated circuit memories.
BACKGROUND OF THE INVENTION
With each new generation of semiconductor memory, the size and power requirements of the memory array becomes more demanding. For example, when moving from a 4 Mb technology to a 16 Mb design, the array area must be increased in order to accommodate the additional memory cells. Increasing the array size, however, adversely effects certain electrical parameters required for optimal circuit performance.
In many applications, such as hand-held, battery powered devices, a low power mode is used to reduce the power consumption of the memory device. Sleep modes are desirable is such applications as they increase the battery life of the device. Sleep modes which provide finer granularity without compromising data integrity are highly desirable. Additionally, as the memory array increases, it is inefficient to refresh an entire dynamic memory array where only a portion of the array will be used for an extended time period.
As the speed of these applications increases, it becomes more and more difficult to maintain the integrity of the memory cells as operation switches from normal operating to a low power operating mode and back. Most high density dynamic memory cells are dependent, sharing a plate reference voltage supplied by a nonideal source. Charge injected into a group of storage nodes may effect the quality and integrity of other storage nodes, causing malfunction.
Accordingly, a need exists for an efficient way to operate memory devices which reduces the power consumption of the memory.
REFERENCES:
patent: 5963497 (1999-10-01), Holland
Atwell William Daune
Longwell Michael L.
Myers Jeffrey Van
Hoang Huan
Madrone Solutions, Inc.
Myers Jeffrey Van
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