Apparatus for measuring capacitance of a semiconductor device

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S762010, C324S763010, C324S678000

Reexamination Certificate

active

06731129

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to capacitance measurements in general, and in particular to an apparatus for measuring capacitance. Still more particularly, the present invention relates to an apparatus for measuring capacitance of a semiconductor device.
2. Description of the Related Art
Fundamentally,
C=Q/V
  (1)
where
C=capacitance of a capacitor;
Q=charge within the capacitor; and
V=voltage across the capacitor.
Thus, if a known amount of charge is placed within a capacitor, the capacitance of the capacitor can be determined by measuring the voltage across the capacitor. However, if charges are placed on the capacitor and are then dumped to ground in a cyclical fashion, a discharge current can be formed as follows:
I=QF
  (2)
where
I=discharge current;
Q=charge within the capacitor; and
F=frequency of the charge/discharge cycle.
By combining equations (1) and (2),
C=I
/(
VF
)  (3)
Hence, an accurate capacitance measurement of a capacitor can be obtained by monitoring the discharge current if the voltage and frequency are maintained constant.
A circuit for measuring capacitance of a semiconductor device typically includes a pair of transistors driven by a stable frequency oscillator. The pair of transistors are turned on and off alternately, with one transistor being arranged to charge the semiconductor device to a known voltage and the other transistor being arranged to discharge the semiconductor device to zero voltage. The discharge current is monitored to provide a measure of the capacitance of the semiconductor device.
However, the capacitance of the semiconductor device being measured may be influenced or overshadowed by the parasitic elements, such as parasitic capacitance, parasitic inductance and/or parasitic resistance, which inherently existed between the capacitance measuring circuit and the semiconductor device. As a result, the capacitance measurement may not be as accurate as it should be. Consequently, it is desirable to provide an improved apparatus for measuring capacitance of a semiconductor device.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, a capacitance measuring circuit includes a signal source circuit, a first transistor, a second transistor, and bypass capacitor. The first transistor is connected in series with the second transistor, and the second transistor is connected in series with a device under test. The bypass capacitor connected in parallel with the first and second transistors. Coupled to the first and second transistors, the signal source circuit generates a first signal and a second signal to alternately turn on said first and second transistors such that a discharge current is generated to flow through the first and second transistors.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.


REFERENCES:
patent: 4459541 (1984-07-01), Fielden et al.
patent: 6366098 (2002-04-01), Froment
patent: 6404222 (2002-06-01), Fan et al.
patent: 6501283 (2002-12-01), Lindolf et al.
patent: 6549029 (2003-04-01), Hsieh et al.
Chen, et al., “An On-Chip, Attofarad Interconnect Charge-Based Capacitance Measurement (CBCM) Technique,” 1996 IEEE, Dept. of EECS, University of California Berkeley, 211-37 Cory Hall #1772, Berkeley, California.

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