Apparatus for increasing the speed of operation of non-volatile

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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365203, G11C 700

Patent

active

052455742

ABSTRACT:
In a memory array having a plurality of bitlines each connected to a plurality of memory devices having a state in which current is transferred by the memory device and a state in which current is not transferred by the device, a column select device for activating each bitline, a plurality of wordlines for activating individual memory devices joined to each bitline, apparatus for providing constant current in the conducting state of a memory device connected to a bitline, a device connecting a source voltage to a plurality of bitlines, and a reference bitline for providing an output reference signal, the improvement including apparatus for providing a source of current in addition to current through the device connecting a source voltage to a plurality of bitlines in order to charge any capacitance of a selected bitline when that bitline is selected whereby switching between memory devices joined to different bitlines is accelerated.

REFERENCES:
patent: 4388705 (1983-06-01), Sheppard
patent: 4780850 (1988-10-01), Miyamoto
patent: 4879682 (1989-11-01), Engles
patent: 4982367 (1991-01-01), Miyatake
patent: 5023839 (1991-06-01), Suzuki
patent: 5063540 (1991-11-01), Takahashi
patent: 5091888 (1992-02-01), Akaogi
patent: 5117394 (1992-05-01), Amin

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