Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2006-01-31
2006-01-31
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S503000, C375S229000, C375S233000
Reexamination Certificate
active
06993673
ABSTRACT:
Apparatus for recovering timing of data input to a receiver, the apparatus consisting of an interpolator which receives the input data and generates interpolated-data in response to an interpolation coefficient, and a feed-forward equalizer having at least three taps. Each tap consists of a multiplier which is coupled to multiply a respective input sample by a respective adaptive equalization coefficient. The taps are arranged in sequence so that the input sample to each of the taps, except to a first tap in the sequence, is delayed relative to a preceding tap in the sequence. The equalizer receives and equalizes the interpolated-data so as to generate equalized-data from the interpolated-data. The apparatus also includes a timing sensor which adjusts the interpolation coefficient responsive a third adaptive equalization coefficient comprised in the equalization coefficients.
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Bublil Baruch
Greiss Israel
Jacob Jeffrey
Taich Dimitry
Abelman ,Frayne & Schwab
Cao Chun
Mysticom Ltd.
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