Apparatus for fast internal reference cell trimming

Details Apparatus for fast internal reference cell trimming Apparatus for fast internal reference cell trimming

1994-06-02

1995-08-22

Nelms, David C.

Static information storage and retrieval

Read/write circuit

365185, 365900, 365210, 36518907, 36518909, G11C 1140

Patent

active

054446562

ABSTRACT:
A memory array having memory devices arranged in rows and columns, each column including a load device across which a first voltage level is provided when a memory device being read is in one condition and a second voltage level is provided when a memory device being read is in a second condition, a reference device arranged in series with another load device, a sensing device for detecting the voltages across the load devices and providing a first output signal when the voltage across the first load device is greater than the voltage across the second voltage device and a second output when the voltage across the first load device is less than the voltage across the second voltage device. The array also includes an arrangement for decoupling the memory devices and the associated load devices and applying a precise voltage equivalent to the one of the voltages across the load device while programming the reference devices so that the voltage across the second load device is compared to this precise voltage when the reference device is being programmed.

REFERENCES:
patent: 5293345 (1994-03-01), Iwahashi
patent: 5293560 (1994-03-01), Harari
patent: 5351212 (1994-09-01), Hashimoto
patent: 5355333 (1994-10-01), Pascucci
patent: 5395362 (1995-02-01), Banks

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