Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1996-07-26
1999-08-17
Gossage, Glenn
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711220, 341 81, 348426, 348390, 375340, G06F 1200, H04N 7015
Patent
active
059408634
ABSTRACT:
An apparatus for re-rotating and deinterleaving data includes (i) a first memory for storing D elements of rotated and interleaved data in D storage locations, (ii) a first addresser for addressing the first memory in order to read de-rotated and interleaved data out of the D storage locations and to write rotated and interleaved data into the D storage locations, (iii) a second memory for storing mD elements of the de-rotated and interleaved data read out of the first memory, wherein the de-rotated and interleaved data read out of the first memory are stored in mD storage locations of the second memory, and (iv) a second addresser for addressing the second memory in order to read de-rotated and de-interleaved data out of the mD storage locations and to write de-rotated and interleaved data from the first memory into the mD storage locations. The first addresser may include an address counter, an offset generator, and a modulo adder. The second addresser may include a counter, a seed generator, and a modulo converter.
REFERENCES:
patent: 5369652 (1994-11-01), Bailey et al.
patent: 5537420 (1996-07-01), Huang
ATSC Digital Television Standard, Annex D, Sep. 16, 1995, Sections 4.1-4.2.5, pp. 48-56.
Fimoff Mark
Spaete, Jr. Lawrence C.
Gossage Glenn
Zenith Electronics Corporation
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