Apparatus for data communication between universal asynchronous

Multiplex communications – Wide area network – Packet switching

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370535, G06F 1340

Patent

active

057992088

ABSTRACT:
An apparatus that provides data communication between universal asynchronous receiver/transmitter (UART) modules on a first IC chip of a chip set and associated transceivers on a second IC chip of the same chip set. The apparatus includes a first multiplexer/demultiplexer unit coupled by first buses to the UART modules, and a second multiplexer/demultiplexer unit coupled by second buses to the transceivers. A common bus is interconnected between the first multiplexer/demultiplexer unit and the second multiplexer/demultiplexer unit. A control unit selectively connects the common bus to one of the first buses and one of the second buses so as to connect one of the UART modules in the first IC chip to the associated transceiver in the second IC chip.

REFERENCES:
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patent: 5519872 (1996-05-01), Khandekar et al.
patent: 5590377 (1996-12-01), Smith
patent: 5632021 (1997-05-01), Jennings et al.
patent: 5664117 (1997-09-01), Shah et al.

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