Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Reexamination Certificate
2005-08-09
2005-08-09
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
C713S500000
Reexamination Certificate
active
06928575
ABSTRACT:
A first processor, a second processor, a memory and a clock supply unit are integrated together on a single chip. The first processor operates synchronously with a first internal clock signal. The second processor operates synchronously with a second internal clock signal. The memory operates synchronously with a third internal clock signal. The clock supply unit generates three clock signals, which are in phase with each other, from an external clock signal and supplies those clock signals as the first, second and third internal clock signals. The first and second processors share the memory via a data bus. Each of the processors has an internal reset signal.
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Marui Shin'ichi
Okabayashi Kazuhiro
Okamoto Minoru
Browne Lynne H.
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Yanchus, III Paul
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