Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-06-15
2009-02-17
Torres, Joseph D (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S784000, C714S786000
Reexamination Certificate
active
07493547
ABSTRACT:
The present invention provides a coding device of a low-density parity-check (LDPC) code for simply coding information data without generating a code generator matrix. The coding device forms a parity-check matrix having two sub-matrixes. At this time, the first sub-matrix is a random matrix or a structural matrix. The second sub-matrix is a structural matrix having two 1s in each column. Parity data is calculated by using the structural second matrix without calculating an inverse matrix of the second matrix when temporary data is generated by using the first sub-matrix with reference to the information data. Code data is generated from the parity data and the information data and is transmitted.
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Thomas J.Richardson, et al; ‘Efficient Encoding of Low-Density Parity-Check Codes’; IEEE Transations on Information Theory, vol. 47, No. 2, pp. 638-656, Feb. 2001.
John L. Fan, ‘Array Codes as Low-Density Parity—Check Codes’, 2nd International Symposium on Turbo Codes & Related Topics, vol. 1, pp. 543-546 Sep. 4-7, 2000.
Bang Seung-Chan
Jung In-Hwa
Kim Nam-Il
Kim Young-Hoon
Lee Kyoung-Joon
Blakely & Sokoloff, Taylor & Zafman
Electronics and Telecommunications Research Institute
Torres Joseph D
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