Apparatus for applying viscous materials to a lead frame

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step

Reexamination Certificate

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Details

C228S036000, C427S208000, C427S208600

Reexamination Certificate

active

06436732

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to semiconductor assembly processes and equipment and, more particularly, to the application of adhesives and other viscous materials to components of a semiconductor device lead frame.
BACKGROUND OF THE INVENTION
Higher performance, lower cost, increased miniaturization of semiconductor components, and greater packaging density of integrated circuits are goals of the computer industry. One way to reduce the overall cost of a semiconductor component is to reduce the manufacturing cost of that component. Lower manufacturing costs can be achieved through faster production and/or reduction in the amount of materials used in fabricating the semiconductor component.
One area where faster production and reduction in material usage can be achieved is lead frame attachment to semiconductor dice. U.S. Pat. No. 5,286,679 issued Feb. 15, 1994 to Farnworth et al. (“the '679 patent”), assigned to the assignee of the present invention and incorporated herein by reference, teaches attaching leads to a semiconductor device with adhesive material in a “lead-over-chip” (“LOC”) configuration. The '679 patent teaches applying a patterned thermoplastic or thermoset adhesive layer to a semiconductor wafer. The adhesive layer is patterned to keep the “streets” on the semiconductor wafer clear of adhesive for saw cutting and to keep the wire bonding pads on the individual dice clear of adhesive for wire bonding. Patterning of the adhesive layer is generally accomplished by hot or cold screen/stencil printing or dispensing by roll-on. Following the printing and baking of the adhesive layer on the semiconductor wafer, the individual dice are cut from the semiconductor wafer. During packaging, each adhesive coated die is attached to lead fingers of a lead frame by heating the adhesive layer and pressing the lead fingers onto the adhesive. If the adhesive layer is formed of a thermoset material, a separate oven cure is required. Furthermore, the adhesive layer may be formulated to function as an additional passivating/insulating layer or alpha barrier for protecting the packaged die.
Although the teaching of the '679 patent is an effective method for attaching leads in a LOC configuration, it is sometimes difficult to achieve an adequate profile on the adhesive such that there is sufficient area on the top of the adhesive to attach the lead fingers. The process disclosed on the '679 patent is illustrated in
FIGS. 15-21
.
FIG. 15
illustrates a cross sectional view of a semiconductor substrate
302
with a bond pad
304
, wherein a stencil or a screen print template
306
has been placed over the semiconductor substrate
302
, generally a silicon wafer. The stencil or screen print template
306
is patterned to clear the area around the bond pads
304
and to clear street areas
308
for saw cutting (i.e., for singulating the substrate into individual dice). An adhesive material
310
is applied to the stencil or screen print template
306
, as shown in FIG.
16
. Ideally, when the stencil or screen print template
306
is removed, adhesive prints
312
are formed with vertical sidewalls
314
and a planar upper surface
316
, as shown in FIG.
17
. However, since the adhesive material
310
must have sufficiently low viscosity to flow and fill the stencil or screen print template
306
, as well as allow for the removal of the stencil or screen print template
306
without the adhesive material
310
sticking thereto, the adhesive material
310
of the adhesive prints
312
may spread, sag, or flow laterally under the force of gravity after the removal of the stencil or screen print template
306
, as shown in FIG.
18
. This post-application flow of adhesive material
310
can potentially cover all or a portion of the bond pads
304
or interfere with the singulating of the semiconductor wafer by flowing into the street areas
308
.
Furthermore, and of even greater potential consequence than bond pad or street interference is the effect that the lateral flow or spread of adhesive material
310
has on the adhesive material upper surface
316
. As shown in
FIG. 19
, the adhesive material upper surface
316
is the contact area for lead fingers
318
of a lead frame
320
. The gravity-induced flow of the adhesive material
310
causes the once relatively well-defined edges
322
of the adhesive material to curve, resulting in a loss of surface area
324
(the ideal shape is shown with dotted lines) for the lead fingers
318
to attach. This loss of surface area
324
is particularly problematical for the adhesive print material upper surface
316
at the longitudinal ends
326
(seen in FIG.
20
). At the adhesive material longitudinal ends
326
, the adhesive material flows in three directions (to both sides as well as longitudinally) causing a severe curvature
328
, as shown in
FIGS. 20 and 21
. The longitudinal ends of the adhesive print on patch flow in a 180° flow front resulting in blurring of the print boundaries into a curved perimeter. This curvature
328
results in complete or near complete loss of effective surface area on the adhesive material upper surface
316
for adhering the outermost lead finger closest to the adhesive material end
326
(lead finger
330
). This results in what is known as a “dangling lead.” Since the lead finger
330
is not adequately attached to the adhesive material end
326
, the lead finger
330
may move or bounce when a wire bonding apparatus attempts to attach a bond wire between the lead finger
330
and its respective bond pad
304
. This movement can cause inadequate bonding or non-bonding between the bond wire and the lead finger
330
, resulting in the failure of the component due to a defective electrical connection.
LOC attachment can also be achieved by attaching adhesive tape, preferably insulative, to an active surface of a semiconductor die, then attaching lead fingers to the insulative tape. As shown in
FIG. 22
, two strips of adhesive tape
410
and
410
′ are attached to an active surface
412
of a semiconductor die
404
. The two adhesive tape strips
410
,
410
′ run parallel to and on opposing sides of a row of bond pads
406
. Lead fingers
402
,
402
′ are then attached to the two adhesive tape strips
410
,
410
′, respectively. The lead fingers
402
,
402
′ are then electrically attached to the bond pads
406
with bond wires
408
. Although this method is effective in attaching the lead fingers
402
,
402
′ to the semiconductor die
404
, this method is less cost effective than using adhesive since the cost of adhesive tape is higher than the cost of adhesive material. The higher cost of the adhesive tape is a result of the manufacturing and placement steps which are required with adhesive tapes. The individual tape segments are generally cut from a larger tape sheet. This cutting requires precision punches with extremely sharp and accurate edges. These precision punches are expensive and they wear out over time. Furthermore, there is always waste between the segments which are punched out, resulting in high scrap cost. Moreover, once punch out is complete, the tape segments are placed on a carrier film for transport to the die-attach site. Thus, there are problems with placement, alignment, and attachment with film carriers, plus the cost of the film carrier itself.
LOC attachment can also be achieved by placing adhesive material on the lead fingers of the lead frame rather than on the semiconductor substrate. As shown in
FIG. 23
, the adhesive material
502
may be spray applied on an attachment surface
504
of lead fingers
506
. However, the viscous nature of the adhesive material
502
results in the adhesive material
502
flowing down the sides
508
of the lead finger
506
and collecting on the reverse, bond wire surface
510
of the lead finger
506
, as shown in FIG.
24
. The adhesive material
502
, which collects and cures on the bond wire surface
510
, interferes with subsequent wire bonding, which in t

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