Apparatus for adjusting slew rate in semiconductor memory...

Details Apparatus for adjusting slew rate in semiconductor memory... Apparatus for adjusting slew rate in semiconductor memory...

2007-05-29

2007-05-29

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S027000, C326S030000, C326S087000

Reexamination Certificate

active

11016528

ABSTRACT:
The present invention relates to an apparatus for adjusting a slew rate of a data signal outputted by a signal from an external circuit in a semiconductor memory device and a method therefor. The apparatus includes: a slew rate control signal generation block for outputting a plurality of slew rate control signals through combining control codes inputted from the external circuit in response to a command signal; and a data buffer for adjusting a slew rate of a data signal inputted by using the slew rate control signals.

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