Apparatus for adjusting a clock frequency of a variable...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C340S870030, C709S233000, C710S060000, C710S306000, C710S313000, C712S032000

Reexamination Certificate

active

07606960

ABSTRACT:
An embodiment involves throttling a bus frequency based upon incoming arbitration requests from units or devices coupled to a bus. Arbitration circuitry monitors request rates from each requestor and increases or decreases the bus frequency in order to meet the bandwidth levels requested. When the bandwidth requirements increase, the bus frequency increases. When the bandwidth requirements are reduced, the bus frequency is reduced to reduce power consumption. No software intervention is required to adjust the bus bandwidth.

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