Computer graphics processing and selective visual display system – Computer graphics display memory system – Addressing
Reexamination Certificate
1999-05-19
2002-11-26
Zimmerman, Mark (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Addressing
C345S543000, C711S101000, C711S105000
Reexamination Certificate
active
06486884
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method and apparatus for accessing memory, and more specifically relates to a method and apparatus for accessing memory in a video system.
BACKGROUND OF THE INVENTION
Many computer and database applications involve data having a multi-dimensional nature. For example, data in a spreadsheet is referenced with regard to a particular row and column in which the data appears. The same is true for data associated with video image data. Video image data, or video data, can be referenced relative to a particular x-y coordinate location for two dimensional (2-D) video data, and with regards to particular x-y-z coordinates for three dimensional (3-D) video data.
Conventional memory devices are accessed using an uni-dimensional addressing scheme. That is, each data element is one of an adjacent plurality of physical word locations within the memory, and is referenced by a unique, single dimensional, address location. Storing multi-dimensional data in an uni-dimensional memory requires a mapping from each multi-dimensional object coordinate to a corresponding uni-dimensional memory address. The uni-dimensional addressing of the memory space is adequate for many applications. However, where 2-D and 3-D graphic applications are used, the number of video clients requesting data, and the format in which the data is stored require highly optimized accesses to the memory space.
Traditionally, optimization of accessing memory space has occurred through the use of burst accesses to multiple memory locations. During burst accesses, a single memory access request is capable of retrieving or storing multiple words of data with a single access request. However, such a technique is inefficient with data accesses for video memory, in that video data is generally not optimized to have data stored in sequential address spaces in physical memory. Without the data being stored sequentially, it takes longer to acquire data for a requesting client. As a result, there is a greater probability that other clients will be deprived of the memory bandwidth needed in order to service its own needs.
Therefore, it would be desirable to optimize data accesses to a video memory system.
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VLSI Implementation of High Performance Burst Mode for 128 Bit Block Ciphers by Mitsuyama et al IEEE 2001.
Aleksic Milivoje
Gruber Andrew E.
Holister Brad
Mizuyabu Carl K.
ATI International SRL
Monestime Mackly
Vedder Price Kaufman & Kammholz
Zimmerman Mark
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