Apparatus connectable to a computer network for circuit...

Details Apparatus connectable to a computer network for circuit... Apparatus connectable to a computer network for circuit...

2006-08-15

2006-08-15

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C703S013000

Reexamination Certificate

active

07093216

ABSTRACT:
An apparatus for circuit design verification according to an embodiment of the present invention has a verification result collector configured to collect a verification result, a data conversion and registration module configured to convert the verification result to a pre-analysis indication file, an analysis information collector configured to collect analysis information about a redundant non-active portion, an analysis information processor configured to exclude an affect of the redundant non-active portion and make an analysis indication file, an indication file storage portion configured to store the analysis indication file, and a data indication controller configured to output the analysis indication file.

REFERENCES:
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patent: 5657240 (1997-08-01), Chakradhar et al.
patent: 6108494 (2000-08-01), Eisenhofer et al.
patent: 6192505 (2001-02-01), Beer et al.
patent: 6237132 (2001-05-01), Dean et al.
patent: 2002/0038203 (2002-03-01), Tsuchiya
patent: 2003/0149945 (2003-08-01), Abadir et al.
patent: 01066578 (1989-03-01), None
patent: P2001-273160 (2001-05-01), None

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