Apparatus and methods to reduce castouts in a multi-level...

Details Apparatus and methods to reduce castouts in a multi-level... Apparatus and methods to reduce castouts in a multi-level...

2011-08-09

2011-08-09

Gu, Shawn X (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000, C711S144000, C711S156000

Reexamination Certificate

active

07996616

ABSTRACT:
Techniques and methods are used to control allocations to a higher level cache of cache lines displaced from a lower level cache. The allocations of the displaced cache lines are prevented for displaced cache lines that are determined to be redundant in the next level cache, whereby castouts are controlled. To such ends, a line is selected to be displaced in a lower level cache. Information associated with the selected line is identified which indicates that the selected line is present in a higher level cache. An allocation of the selected line in the higher level cache is prevented based on the identified information.

REFERENCES:
patent: 5564035 (1996-10-01), Lai
patent: 5787478 (1998-07-01), Hicks et al.
patent: 6282615 (2001-08-01), Arimilli et al.
International Search Report-PCT/US08/052507, International Search Authority-European Patent Office-7-1-08.
Written Opinion-PCT/US08/052507, International Search Authority-European Patent Office-7-1-08.

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