Electrical computers and digital processing systems: support – Multiple computer communication using cryptography – Protection at a particular protocol layer
Patent
1997-07-11
2000-02-29
Peeso, Thomas R.
Electrical computers and digital processing systems: support
Multiple computer communication using cryptography
Protection at a particular protocol layer
713200, 713160, 713178, 380 36, 380278, 380283, H04L 1228
Patent
active
060322586
ABSTRACT:
A method for validating a message packet communicated from a source node to a destination node in a computer network is disclosed. The source node and destination node have access to a clock mechanism synchronized with a common time frame. The method comprises generating a first security key using a time reference obtained from the clock mechanism and a password known by the source node and destination node, communicating the first security key with a message packet from the source node to the destination node, and when the first security key and message packet are received by the destination node, generating a second security key using the password and the time reference and comparing the second security key with the first security key. The message packet is discarded if the second security key does not correspond with the first security key.
In another aspect of the invention, the method further comprises communicating a first time reference obtained from the clock mechanism with a message packet, and when the first time reference and message packet are received by the destination node, comparing the first time reference with a second time reference obtained from the clock mechanism. The message packet is discarded if the time difference between the first time reference and the second time reference is greater than a predetermined amount of time. The predetermined amount of time may be based on a calculated normal packet transmission delay.
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Fawcett Glenn S.
Godoroja Andrei
Tosey Joseph P. R.
Glenayre Electronics, Inc.
Peeso Thomas R.
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