Apparatus and methods for resistivity testing

Details Apparatus and methods for resistivity testing Apparatus and methods for resistivity testing

1985-02-22

1987-10-27

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Conductor identification or location

Inaccessible

324158P, 324158F, G01R 1073

Patent

active

047032529

ABSTRACT:
An automatic sheet resistance mapping system for semiconductor wafers which has the capability of taking high accuracy, multiple test readings in both contour scan and diameter scan modes. A rotatable wafer stage carries a semiconductor wafer thereon with the center of the wafer positioned substantially at the axis of rotation of the wafer stage. A probe head assembly, including a linear array of at least four equally spaced probe tips projecting from one surface of the assembly is mounted facing the wafer stage on an arrangement for moving the probe tips alternately into and out of contact with the surface of a wafer carried thereon. Positioning arrangements are provided for rotating the wafer stage to accurately registered angular test positions and for producing translation between the wafer stage and the probe head assembly to position the array of probe tips at accurately registered radial test positions relative to the center of the wafer. The positioning arrangements are operable in a diameter scan mode to locate the probe tips at a multiplicity of successive, closely spaced test positions along a diameter line of the wafer and are operative in a contour scan mode to locate the probe tips at a two-dimensional array of different positions across the area of the wafer. The mounting arrangement for the probe head positions the probe head in a prearranged alignment position with the linear array of probe tips oriented at a prearranged small acute angle to a radius line so that the test probe tips each define a track of separated test probe footprints on the wafer in the diameter scan mode.

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patent: 4267506 (1981-05-01), Shiell
"Multiple Contactor Indexing Mechanism", by Perlman et al., IBM Tech. Disc. Bull., vol. 19, #2, 7/76, pp. 579-580.

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