Apparatus and methods for multi-gate silicon-on-insulator...

Details Apparatus and methods for multi-gate silicon-on-insulator... Apparatus and methods for multi-gate silicon-on-insulator...

2007-12-11

2007-12-11

Le, Don (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S081000, C326S038000, C327S534000

Reexamination Certificate

active

11466565

ABSTRACT:
An integrated circuit (IC) includes mechanisms for adjusting or setting the gate bias of one gate of one or more multi-gate transistors. The IC includes a gate bias generator. The gate bias generator is configured to set a gate bias of one gate of the one or more multi-gate transistors within the IC. More specifically, the gate bias generator sets the gate bias of the transistor(s) so as to trade off performance and power consumption of the transistor(s).

REFERENCES:
patent: 6359472 (2002-03-01), Nakayama et al.
patent: 6525562 (2003-02-01), Schultz et al.
patent: 6583646 (2003-06-01), Patel et al.
patent: 6635934 (2003-10-01), Hidaka

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