Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-03-13
2007-03-13
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11196129
ABSTRACT:
In one embodiment, a system comprises a computer. The computer is configured to generate a plurality of partial sums corresponding to a first time point of a response on an interconnect, and generate the response at the first time point as a sum of the partial sums. The plurality of partial sums are a function of at least: one or more poles and residues of the interconnect and a time step; wherein at least a first partial sum of the plurality of partial sums is also a function of the first partial sum calculated for a second time point that precedes the first time point.
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Dinh Paul
Merkel Lawrence J.
Meyertons, Hood, Kivlin, Kowert & Goetzel P.c.
Nascentric, Inc.
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