Apparatus and methods for compiled static timing analysis

Details Apparatus and methods for compiled static timing analysis Apparatus and methods for compiled static timing analysis

2006-12-26

2006-12-26

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C703S019000

Reexamination Certificate

active

07155691

ABSTRACT:
A system for analyzing an electronic circuit includes a computer. The computer obtains a description of the electronic circuit. The computer further analyzes the electronic circuit by using compiled static timing analysis (CSTA). Specifically, in one embodiment, the computer is configured to compile a timing model for the circuit responsive to the description of the circuit. The timing model comprises a description of a timing path and a description of an algorithm to evaluate the timing path. The computer is further configured to analyze a design that includes the circuit, wherein the analyzing comprises evaluating the timing model, and wherein evaluating the timing model comprises performing the algorithm to evaluate the timing path.

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