Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-07-26
2005-07-26
Myers, Paul R. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S317000, C710S309000, C710S038000, C710S113000
Reexamination Certificate
active
06922749
ABSTRACT:
An input port is described having an input policing unit that checks if a virtual lane has a sufficient number of credits to carry an input packet received by the input policing unit. The input port also has a request manager that generates a request for the packet to be switched by a switching core. The input port also has a packet Rx unit that stores the packet into a memory by writing blocks of data into the memory. The input port also has a packet Tx unit that receives a grant in response to the request and reads the packet from the memory in response to the grant by reading the blocks of data. The input port also has a pointer RAM manager that provides addresses for free blocks of data to said packet Rx unit and receives addresses of freed blocks of data from said packet Tx unit.
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Colloff Ian
Gil Mercedes
Schober Richard L.
Agilent Technologie,s Inc.
Myers Paul R.
Phan Raymond N
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