Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-12-13
2005-12-13
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S167000, C710S058000
Reexamination Certificate
active
06976120
ABSTRACT:
A method and an apparatus to track transition of a flag signal for DRAM data transfer have been disclosed. In one embodiment, the apparatus includes one or more memory devices, coupled to a data bus, to receive a command signal, wherein the command signal initiates a set of data transfer operations to transfer data between the data bus and one of the one or more memory devices; and a timing unit, coupled to the one or more memory devices, to receive the command signal, a flag signal, and a memory select signal, the timing unit to generate a trigger signal, in response to a transition of the flag signal, to complete the data transfer operations if the memory select signal corresponds to the one of the one or more memory devices. Other embodiments have been claimed and described.
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David Howard S.
Khandekar Narendra S.
Williams Michael W.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Peikari B. James
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