Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-05-02
2006-05-02
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S130000
Reexamination Certificate
active
07039763
ABSTRACT:
Briefly, in accordance with an embodiment of the invention, an apparatus and method to share a cache memory is provided. The method may include dynamically partitioning a cache memory to cache data for one or more active clients during operation of the cache memory, wherein the number of active clients varies during operation of the cache memory. The apparatus may include a control device coupled to a cache memory to dynamically partition the cache memory.
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John L. Hennessy et al., “Computer Architecture a Quantitative Approach”, Morgan Kaufman Publishing, 1990, pps 408-414.
Morrow Michael W.
O'Connor Dennis M.
Anderson Matthew D.
Travis John F.
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