Apparatus and method to reduce undesirable effects caused by...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S226000

Reexamination Certificate

active

07142446

ABSTRACT:
A method and apparatus is provided for reducing the current in a memory device. Peripheral device control signals are translated to the wordline off voltage level, such as a negative wordline voltage. The translated signals prevent the peripheral devices from conducting current in the wordline off mode, even if a wordline-to-digitline short should occur. The control signals may include a column select signal for a column select device and an active pull-up signal for a sense amplifier, among others. Additionally, an equalization circuit having high and low resistance components is provided for the memory device. The equalization circuit limits current, even if a wordline-to-digitline short occurs.

REFERENCES:
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patent: 6049495 (2000-04-01), Hsu et al.
patent: 6127878 (2000-10-01), Hanson et al.
patent: 6392942 (2002-05-01), Noda et al.
patent: 6535430 (2003-03-01), Ogura et al.
patent: 6556503 (2003-04-01), Schreck
patent: 6850454 (2005-02-01), Kuge et al.
patent: 2005/0281099 (2005-12-01), Lovett

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