Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
Reexamination Certificate
2004-03-31
2008-10-21
Dollinger, Tonia L. M. (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Flow controlling
C710S033000, C710S052000, C710S057000
Reexamination Certificate
active
07441055
ABSTRACT:
An apparatus and method for maximizing buffer utilization in an I/O controller using credit management logic contained within the I/O controller. The credit management logic keeps track of the number of memory credits available in the I/O controller and communicates to a chipset connected to the I/O controller the amount of available memory credits. The chipset may then send an amount of data to the I/O controller equivalent to or less than the communicated available amount of memory credits to reduce the occurrence of a “retry” event. The amount of available memory credits is determined by comparing the available memory in each buffer within the I/O controller and designating that the “available” amount of memory for the I/O controller is an amount equivalent to the amount of memory contained in the buffer with the least amount of available memory. This “available” amount of I/O controller memory may then be converted into memory credits and communicated to the chipset.
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Kwok Wilfred W.
Muthrasanallur Sridhar
Wagh Mahesh U.
Blakely , Sokoloff, Taylor & Zafman LLP
Dollinger Tonia L. M.
Franklin Richard
Intel Corporation
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