Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Reexamination Certificate
2000-01-04
2002-10-08
Verbrugge, Kevin (Department: 2187)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
Reexamination Certificate
active
06463500
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to computer systems and memory complexes that can store different types of objects in a rapid and efficient manner. In more particular aspects, this invention relates to an improved method of storing objects into memory wherein the memory complex can define large object input data as “sub-objects” which match the characteristics of the memory complex memory components.
BACKGROUND OF THE INVENTION
An “object” is discrete bundle of information written to or read from the memory complex of a computer system. Memory complexes generally comprise memory modules, such as DRAM and SRAM. A memory module has a plurality of memory addresses which may each receive data in a “write” operation or send data in a “read” operation. Different memory modules may contain different amounts of data in their addresses. In many cases, an object written into memory cannot fit in a single memory location, and accordingly it must be allocated into different memory locations. Conventional memory complex systems store objects that comprise N memory locations in a fixed way, like in N consecutive memory locations (i.e. at address A, A+1, A+2, . . . A+N−1), or in N different memory modules at the same corresponding address (i.e. at address A, A+2
20
, A+2*2
20
. . . , wherein 2
20
is an exemplary maximum memory module address range). To read or write such an object requires a sequential series of read or write operations in the former case, and specific address assignments across numerous memory modules in the latter. By requiring a sequential series of read/write cycles to process an object, performance of a programming application is significantly degraded when compared to an application that can process an object in one operation, or “bus cycle.” And where a common address must be used in numerous memory modules, if any of the addresses are unavailable a write operation will fail and must be executed again until another common address is found. Therefore application programmers must know the address sizes of the memory complex memory modules in order to arrive at a programming solution for programming applications which require read/write operations involving objects. For example, an application program written for a memory complex comprising DRAM memory chips with a width of 128 bits may write objects of up to 128 bits in width in one location on one chip; however, if the same program is used with a memory complex comprising SRAM memory chips with a widths of 32 or 36 bits, any objects over 36 bits in width must be written in more than one location in more than one read/write cycle, resulting in a significant degradation of the performance of the application on that system when the application processes objects over 36 bits in size. Therefore, a program written for memory complexes comprising DRAM memory chips may perform unacceptably in computer systems using memory complexes comprising SRAM chips.
What is needed is a computer system and memory complex that can efficiently store objects in a variety of memory modules, thereby allowing programming applications to read and write objects to a variety of memory chips structures without regard to specific memory chip architecture within the memory complex. This would allow an application programmer to solve for the size of the data handled by the program independent of the physical representation of the memory structures used by the applications, and allow a variety of memory complexes to be used with a given programming solution.
SUMMARY OF THE INVENTION
A method is provided for utilizing a memory system which allows for the fast and efficient writing and reading of objects to and from diverse memory chips. A computer system and memory system complex according to method is also provided. The memory chips may comprise sets of different kinds of memory modules which vary in terms of access speed, latency and memory width, such as for example DRAM or SRAM memory modules.
The invention defines objects in terms of “shapes.” The shape of an object is defined by two parameters: “Width” and “Height.” The Height of an object denotes the number of consecutive address locations at which the object is stored on a memory module. The Width of an object denotes the number of memory modules at which the object is stored. An advantage of the invention is that objects are defined in terms of “sub-objects” optimized for the memory system. The sub-objects match the line-width of the memory, thereby allowing the objects to be efficiently written to different memories or memory banks. A further advantage of the invention is that the sub-object shape is transparent to the requester (i.e. transparent to application assembly language). A further advantage of the invention is that sub-objects are handled independently by the memory arbiter, i.e. they can be written to the memory or read from the memory in any order.
The complex may further comprise a Tree Search Memory (TSM) system that utilizes a “tree” object hierarchy to perform high-speed memory lookups. Shaping is used to specify how an object is stored in the TSM. The trees consist of different kinds of objects with different shapes. An important advantage of the invention is that the concept of shapes can be used for memory bandwidth distribution and performance increase, allowing objects that are frequently read from memory to be distributed in specific sub-object ordering.
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patent: 5701467 (1997-12-01), Freeston
patent: 5786955 (1998-07-01), Kori et al.
patent: 5924115 (1999-07-01), Von Herzen et al.
Heddes Marco C.
Patel Piyush Chunilal
Rinaldi Mark Anthony
Daugherty Patrick J.
Driggs, Lucas, Brubaker & Hogg
International Business Machines - Corporation
Verbrugge Kevin
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