Apparatus and method of processing image data

Computer graphics processing and selective visual display system – Computer graphics display memory system – Plural storage devices

Reexamination Certificate

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Reexamination Certificate

active

06771271

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to memory management and, more particularly, the invention relates to improving memory efficiency in a graphics processing system.
BACKGROUND OF THE INVENTION
Among the many benefits of modern computer systems is their ability to produce vivid graphical displays. Consequently, computer systems have become widely used tools in various graphics arts, such as in photography and graphic design. Increased computer usage for such purposes, however, has the effect of increasing the complexity of designs and, correspondingly, the complexity of software producing the graphical images.
The art has responded to this need by adding more processing power to computer systems. For example, many computer systems have dedicated graphics processors specifically designed to reduce the computational burden on the main processor. Many such computers thus have processing speeds that exceed the speed of other computer components, such as the main memory (i.e., RAM) or the cache. In fact, many conventional personal computers have main processors that alone exceed the speed of the main memory and the cache. Accordingly, although processor speeds have increased, main memory and cache can produce processing bottlenecks within a computer system, undesirably impeding the image rasterization process.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, a relatively high speed circular memory device, in combination with other processes, improves image processing efficiency. To that end, a method and apparatus of processing image data stored in an initial memory logically divides the image into a plurality of contiguous strips. A first plurality of the strips are stored in a working memory having a circular addressing arrangement, where the working memory is faster than the initial memory and has a plurality of sequential address locations. The first plurality of strips are contiguous and have a start address. In addition, the first plurality of strips are stored in the working memory in a contiguous manner, and processed through the working memory relative to the start address.
In some embodiments, the first plurality of strips are considered to be stored in a contiguous manner when contiguous portions of different strips (in the plurality of strips) are stored in contiguous address locations of the working memory. To maintain circularity, the working memory may have a first memory location and a last memory location, where the first memory location is logically contiguous with the last memory location. Moreover, during processing, an offset from the start addressed may be calculated.
In other embodiments, a new strip is stored in the working memory as the first plurality of strips are being processed. The new strip is contiguous with the first plurality of strips. At least one strip from the first plurality of strips thus may be processed together with the new strip. The working memory may be divided into a given number of strip areas, and the image data in each strip includes a plurality of rows of image data. In such embodiments, strips may be stored by shifting the plurality of rows for storage in the working memory based upon the given number of strip areas.
In accordance with other aspects of the invention, an apparatus for processing image data stored in an initial memory that is logically divided into a plurality of contiguous strips includes an address manager for accessing a working memory in a circular manner. The working memory is faster than the initial memory and has a plurality of sequential address locations. The apparatus also includes a data transfer device that stores a first plurality of the strips in the working memory, where the first plurality of strips are contiguous and having a start address. The first plurality of strips are stored in the working memory in a contiguous manner. The apparatus further includes a processor for processing the first plurality of strips through the working memory relative to the start address.
Illustrative embodiments of the invention are implemented as a computer program product having a computer usable medium with computer readable program code thereon. The computer readable code may be read and utilized by a computer system in accordance with conventional processes.


REFERENCES:
patent: 4811411 (1989-03-01), Hashihara et al.
patent: 4965751 (1990-10-01), Thayer et al.
patent: 5022088 (1991-06-01), Hisada et al.
patent: 5052046 (1991-09-01), Fukuda et al.
patent: 6411302 (2002-06-01), Chiraz
patent: 2002/0091916 (2002-07-01), Dowling

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