Apparatus and method of memory access control for bus masters

Details Apparatus and method of memory access control for bus masters Apparatus and method of memory access control for bus masters

2005-07-26

2005-07-26

Shin, Christopher B. (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S308000, C709S212000

Reexamination Certificate

active

06922740

ABSTRACT:
A method and apparatus of memory access control for bus masters are described. In one embodiment, the method includes the receipt of a direct memory access (DMA) request from a device. Once the DMA request is received, DMA access rights of the device are determined according to an access control list (ACL). Once determined, the device is granted DMA access according to the determined memory access rights of the device. In other words, if a DMA request coincides with DMA access rights assigned to the device, the DMA request is executed. Otherwise, the operating system may be notified of an unauthorized DMA request.

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