Apparatus and method of error detection and correction in a...

Details Apparatus and method of error detection and correction in a... Apparatus and method of error detection and correction in a...

2007-10-30

2007-10-30

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Reliability

C326S011000, C326S038000, C326S040000

Reexamination Certificate

active

11617559

ABSTRACT:
The present system comprises a radiation tolerant programmable logic device having logic modules and routing resources coupling together the logic modules. Configuration data lines providing configuration data control the programming of the logic modules and the routing resources. Error correction circuitry coupled to the configuration data lines analyzes and corrects any errors in the configuration data that may occur due to a single event upset (SEU).

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Carmichael, Carl, “Triple Module Redundancy Design Techniques for Virtex FPGAs,” Application Note: Virtex Series, Nov. 1, 2001, pp. 1-37. (Category X document - p. 14 - p. 15; figure 22 relevant to claims 1, 9 and 10.
Corresponding European Patent Application No. 03819127.6 Supplementary Search Report, Jul. 25, 2007, 3 pages.

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