Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
Reexamination Certificate
1998-11-18
2002-04-09
Maung, Zarni (Department: 2154)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Reducing an impact of a stall or pipeline bubble
C712S245000
Reexamination Certificate
active
06370638
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a program control method and an apparatus to achieve and perform stall processing in a computer system which executes instructions using pipeline processing.
2. Description of the Related Art
A computer system, such as a digital signal processor (hereinafter referring to as a DSP), which executes instructions using pipeline processing, includes a dedicated pointer register (hereinafter referring to as PR) to perform data memory addressing. In such a computer system, the competition of the resource such as register interference is occasionally caused between the instructions.
For instance, when a computer system uses four step pipeline, there are four processing stages, an instruction fetch stage (IF), an instruction decode
1
stage (D
1
), an instruction decode
2
stage (D
2
), and execution stage (EX). Data transmission from GR to PR is performed in the EX stage. Moreover, the data memory addressing for PR is performed in the D
1
stage. Therefore, when an instruction with an access to the data memory (For instance, move operation from the data memory to GR:MOV GR, M(PR)) is performed just after an instruction for move operation (MOV PR,GR) from GR to PR, a memory addressing is performed by using the previous value of PR. This phenomenon causes a problem of the register interference.
In order to prevent the resource competition such as register interference and the like, an instruction stall method is adopted, which instruction stall method is inserting the no operation instruction (hereinafter referring to as NOP) between the instructions by which the resource competition is caused. An unexamined Japanese patent application Tokkai-Hei 1-119829 is known technology that solves and performs the problem of the resource competition. Technology disclosed in the unexamined Japanese patent application Tokkai-Hei 1-119829 prevents the register interference in computer system processing by stall control for defining a NOP field for specifying the number of NOP in an instruction code, detecting the specified number of NOP to be inserted by referencing the NOP field in an instruction code decoding stage, and inserting NOP of the predetermined number following the output of execution internal code of the instruction code.
According to this technology, the NOP field is assigned in the instruction code, the number of NOP which is inserted after execution of an instruction concerned is specified in the NOP field in the instruction causing the resource competition such as register interference etc. By the information specified in the NOP field, the stall is executed between a preceding instruction and the following instruction causing the resource competition such as register interference, and the resource competition can be prevented. When a computer system uses four step pipeline processing, memory addressing with new value of the PR renewed in the preceding instruction (instruction
1
) processing can be performed by inserting
2
NOP between the preceding instruction
1
(MOV PR, GR) and the following instruction
2
(MOV GR, M(PR)).
However, in the above-mentioned unexamined Japanese patent application Tokkai-Hei 1-119829 concrete hardware configuration to achieve the stall control by referencing NOP field of the instruction code and inserting predetermined number of NOP is not disclosed at all.
According to the technology disclosed in the unexamined Japanese patent application Tokkai-Hei 1-119829, when a preceding instruction and a following instruction cause resource competition such as register interference, the NOP field is assigned in the preceding instruction, and the number of NOP is set and necessary number of NOP cycle is inserted after executing the preceding instruction.
However, the instruction codes where the NOP field is assigned becomes large when the kind of the preceding instruction causing the resource competition in the processing program occurs often. It is not preferable to overly increment the instruction code where the NOP field is assigned because it results in increasing the instruction code data amount.
Moreover, it is impossible to use this method according to the conventional method of assigning the NOP field in the preceding instruction code when there is not enough available field space for the NOP field.
SUMMARY OF THE INVENTION
Therefore, with the foregoing in mind, it is an object of the present invention to provide a program control apparatus for performing stall control by inserting NOP of the predetermined number into the process referring to the NOP field in an instruction code.
It is an another object of the present invention to provide a method of a program control and an apparatus for suppressing an increase of the instruction code data amount according to the NOP insertion for the stall control when resource competing.
It is an another object of the present invention to provide a method of the program control and an apparatus for improving the available field space compared with a conventional method when the available field space for the NOP field in the instruction code is small.
In order to achieve the objects, a program control method for performing stall processing for a computer system wherein an instruction is operated by using a pipeline processing in accordance with the invention includes the following steps: A step for assigning NOP field which indicates the number of NOP (no operation processing) in an instruction code and a step for decoding the instruction code and inserting N pieces of NOP when the number of NOP specified in the NOP field after executing the instruction corresponding to the instruction code.
According to the above processing, when a preceding instruction and the following instruction cause resource competition in the processing program, the program control method of this invention can insert NOP after the preceding instruction is executed and the following instruction is executed after NOP. The stall control can be achieved.
It is a preferable concerning setting the number of NOP to the NOP field that an assembler or a compiler automatically performs setting the number of NOP to the instruction code where there is a possibility of competition of the resource. As for the second and third method of the program control of the following description, automatically setting of the number of NOP is preferable.
Next, when a preceding instruction and a following instruction cause a resource competition in a processing program, and the kind of the following instruction is less than the kind of the preceding instruction, it is preferable that the NOP field is assigned in the following instruction code.
According to the above processing, when the kind of the following instruction is less than the kind of the preceding instruction among instructions causing resource competition, the number of instructions where the NOP field is assigned as a whole can be reduced by assigning the NOP field in the following instruction code rather than in the preceding instruction code.
In order to achieve the objects, a second program control method of this invention for performing stall processing for a computer system wherein an instruction is operated by using a pipeline processing, when a preceding instruction and a following instruction cause resource competition in a processing program, includes the following steps: A step for assigning the NOP field in both the preceding instruction code and the following instruction code, a step for inserting set number of NOP specified in the preceding instruction after executing the instruction corresponding to the preceding instruction code and a step for inserting set number of NOP specified in the following instruction before executing the instruction corresponding to the following instruction code.
According to the above processing, when there is not enough available field space in the instruction code of either a preceding instruction or a following instruction or both, the available field space will be improve
Chang Jung-won
Matsushita Electric - Industrial Co., Ltd.
Maung Zarni
Rosenthal & Osha L.L.P.
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